What's the maximum input current of 3.3V LVTTL for Cyclone4?

We are using the EP4CE10 for our new design, but ever time the QII complie the design, we get the Warning (169177): 18 pins must meet Altera requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing Cyclone IV E Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems.

So, we read the AN 447 carefully. In our design, we wan to use 3.3V for boh EP4CE10 and it's interface chips such as SRAM and FLASH. But we cann't get the maximum output current value for SRAM and FLASH, and because there are too many pins connected to SRAM and FLASH, using the series termination method is too complex!

If know the maximum input current value of 3.3V LVTTL pin for EP4CE10, we can make choice to add series termination or not.

Anyone knows about it???