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Altera_Forum's avatar
Altera_Forum
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14 years ago

What is wrong with EPCS4

In my custom board I connected EPCS4 device to Cyclone II on this order.

Is this wrong because I was unable to detect EPCS4 device over JTAG. I only want to use JTAG, and in the cyclone II manual on the page 13-63 I see that my design is ok. But maybe MSEL0 and MSEL1, or nCE0 or do i need to pull up DCLK high or low, Either way what do you think I should change here. I just want JTAG not AS or something else... I m using USB blaster... Where I m going wrong here?

http://img155.imageshack.us/img155/184/image1vt.jpg (http://imageshack.us/photo/my-images/155/image1vt.jpg/)

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    That is an AS+JTAG configuration scheme.

    Can you detect the FPGA? If so, your JTAG chain should be OK.

    It's normal that you can't detect the EPCS4 device via JTAG, as it doesn't even support JTAG.

    EPCS can be accessed over JTAG using the Serial Flash Loader, but it doesn't show up in the JTAG chain.

    Basically, the FPGA is first programmed with a firmware that include the SFL and then the EPCS is written through the FPGA, like this:

    Quartus --> USB --> Byte Blaster --> JTAG --> FPGA --> AS --> EPCS4

    To do this, you need to convert your .sof into a .JIC. Check AN370 for more details.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Thank you, that is exactly what I was thinking. Yes I can detect FPGA. So as you are confirming to me all is fine here. Thanks a lot. One more question, is there any way to test external crystal is working?

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    To test a clock input you can create a very simple FPGA design with a counter that divides the frequency down to something in the 1Hz area and use it to flash a LED, if you have one on the board.

    Another way could be to feed that clock signal to a PLL and to monitor the pll's "locked" output.

    IIRC you can also une signaltap and put this clock as clock source for the probe. If there is no clock when you start the measurement I think you'll get a "waiting for clock" message.