What is wrong with EPCS4

To test a clock input you can create a very simple FPGA design with a counter that divides the frequency down to something in the 1Hz area and use it to flash a LED, if you have one on the board.

Another way could be to feed that clock signal to a PLL and to monitor the pll's "locked" output.

IIRC you can also une signaltap and put this clock as clock source for the probe. If there is no clock when you start the measurement I think you'll get a "waiting for clock" message.