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Still have not solved my issue.
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Sorry to hear that.
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I had the boards X-rayed and I got the 3rd board up and running, but they all have the same issue so I am assuming the IC's are likely alright.
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This statement is a little unclear. If you got a 3rd board "up and running", what did you change?
Can you "break" it, and then "fix" it?
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I have not gotten to trying to readback the data in my EPCS yet.
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If you have a 3rd board "up and running", then that implies the EPCS image has been created ok.
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Q1: What is the logic that produces Config_Done. Is it parity, is it a proper byte count, does the memory fuel gauge have to reach "full"?
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You'll never get info on this. Its Altera "secret sauce" :)
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Q2: How do I use the advanced setting in the "Convert Programming File Utility", particularly
1. Program Length Count Adjustment
2. Post-chain bitstream pad bytes
3. Bit-Slice padding value
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I've never had to use any.
For my PS and FPP configuration images, I simple concatenate the .rbf files and program them into the devices, eg.,
puts " - Creating the configuration file data_power.bin"
exec cat data1.rbf data2.rbf data3.rbf data4.rbf > data_power.bin
Cheers,
Dave
Honored Contributor
