What is Timing between nCEO and DCLK in a multi-device AS Configuration ?

--- Quote Start ---

Still have not solved my issue.

--- Quote End ---

Sorry to hear that.

--- Quote Start ---

I had the boards X-rayed and I got the 3rd board up and running, but they all have the same issue so I am assuming the IC's are likely alright.

--- Quote End ---

This statement is a little unclear. If you got a 3rd board "up and running", what did you change?

Can you "break" it, and then "fix" it?

--- Quote Start ---

I have not gotten to trying to readback the data in my EPCS yet.

--- Quote End ---

If you have a 3rd board "up and running", then that implies the EPCS image has been created ok.

--- Quote Start ---

Q1: What is the logic that produces Config_Done. Is it parity, is it a proper byte count, does the memory fuel gauge have to reach "full"?

--- Quote End ---

You'll never get info on this. Its Altera "secret sauce" :)

--- Quote Start ---

Q2: How do I use the advanced setting in the "Convert Programming File Utility", particularly

1. Program Length Count Adjustment

2. Post-chain bitstream pad bytes

3. Bit-Slice padding value

--- Quote End ---

I've never had to use any.

For my PS and FPP configuration images, I simple concatenate the .rbf files and program them into the devices, eg.,

puts " - Creating the configuration file data_power.bin"
exec cat data1.rbf data2.rbf data3.rbf data4.rbf > data_power.bin

Cheers,

Dave