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NBurt's avatar
NBurt
Icon for New Contributor rankNew Contributor
6 years ago

What is the initial state of MAX II devices pre-programming?

What is the initial state of the EPM1270F256I5 before the first programming? I'm trying to determine how to bias it.
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Noah,

By default, both the pin are I/O pin. You will need to set them in Quartus if you want to have dev_clrn and dev_oe feature enabled.

So, I/O pin will be in tri-stated. For unused pin, which you do not configure anything on the pin, by default is in tri-state mode. However, it can be changed depending on your Quartus design. To check your unused pin state in user-mode, kindly go to:

Assignment -> Device -> Device Pin & Options -> Unused Pin

Regards,

YL

NBurt's avatar
NBurt
Icon for New Contributor rankNew Contributor
6 years ago

Hi YL,

Thanks, that's helpful. So to clarify, what you're saying is that:

  • The IO/DEV_CLRn and IO/DEV_OE dual purpose pins by default will be in IO mode.
  • All IO pins are always in tri-state mode during power-on.
  • Unless I configure the IO pins differently, all will be in tri-state mode once the device has reached user mode.

Does that sound accurate? Also, would you say that the IO/GCLKx pins are also in IO mode by default?

Thanks,

Noah