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VSing43's avatar
VSing43
Icon for New Contributor rankNew Contributor
6 years ago

What is correct steps to compile the qsys design created in quartus?

What is correct steps to compile the qsys design created in quartus? I created my qsys design and then I created a separate quartus project and added my .qsys file in it. Once the quartus project wa...
AnandRaj_S_Intel's avatar
AnandRaj_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

  1. check tool and on-chip flash IP settings?
  2. Which configuration are you using? Single Compressed Image/ Dual Compressed Images
  3. Which all IP's you have used in your design?

Assignments -> Device -> Devise and Pin Options -> Configuration -> Set same has On-chip flash IP.

For information on configuration refer below link

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_config.pdf

For information on Creating a System Design with Platform Designer refer below links

https://www.youtube.com/watch?v=d43Pqc_IZpg

https://www.youtube.com/watch?v=tLz-QnZdQkw

Regards

Anand