what buffer element to achieve delayed output...not LCELL usage

The equivalent of what you did for Xilinx is to use LCELL.

It's not a recomended practice because the exact delay will depend on many factors: process, temperature, voltage and routing.

Try to use timing constrains instead.

Use set_output_delay -min and set_output_delay -max.

Or use set_min_delay and set_max_delay if no clock is involved.