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Altera_Forum
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14 years ago

What Altera Dev board should I get?

I am looking to implement an embedded system which is going to control and orchestrate a whole bunch of fast switches on/off etc.

Main requirements are that I need to talk to the board via serial or Ethernet from a GUI. And I need some high speed ADC and DAC on board. (150Msps+) I also could use some transceivers to send signals to other boards. I also prob want to stick with cyclone family for their price/size.

I will probably code all the switching fabric in verilog and do the serial/ethernet communications with the Qsys/NIOS II.

I found this kit to be a possibility:

http://search.digikey.com/us/en/products/dk-dsp-3c120n/544-2566-nd/1832234

Only downside is that it is a cyclone III and doesnt have transceivers.

Any other suggestions?

8 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    That same AD/DA interface board is compatible with multiple Altera/TERASIC boards.

    The Cyclone III dev board is a good board, and works well of this application. To Reach 150 MSPS you will have to really optimize your design for timing however.

    Some of the boards it's compatible with are listed here:

    http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=73&no=360&partno=2#section

    There's also a Cyclone V board in the pipe that looks really interesting.

    called the Cyclone V GX FPGA Dev Kit Board

    I'm under NDA so I can't go into any details, but if you schedule allows for a bit of a wait for the board, I would contact your Altera Rep about it. (I learned about it through Arrow)

    I would highly recommend it, if you want to push 200+ MSPS.

    We're working on a design that we were evaluating a 205 MSPS system, and Cyclone III/Cyclone IV struggled at this rate, but Cyclone V could handle it. (at least with the timing models in the beta version of Quartus 12).

    Pete
  • Altera_Forum's avatar
    Altera_Forum
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    Awesome thanks for the info!

    Yes I was wondering whether any new Dev boards were in the works. It would be nice to get the cyclone V dev because of the transceivers built in, but not sure I can wait unfortunately.

    Actually i stated 150Msps but what we really need is only like 1-10Msps. So maybe this would be fine.

    Pete: this will be my first NIOS II project and ADC to FPGA interface. Any tutorials/books you recommend?
  • Altera_Forum's avatar
    Altera_Forum
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    Sorry I don't have any really good books to recommend for NIOS. I pretty much learned by fire.. :)

    A couple of pointers however, if you plan on building your own ADC module connected to the NIOS, get to know the avalon bus:

    www.altera.com/literature/manual/mnl_avalon_spec.pdf

    Then grab the datasheet for the ADC you are using and understand the signalling interface, and data format, and start coding in your language of choice.

    Maybe someone else on the forum can recommend a good NIOS/QSYS book for you.
  • Altera_Forum's avatar
    Altera_Forum
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    You mentioned the Avalon bus, however the Cyclone III DSP development kit i am looking at seems to do its ADC, DAC conversion without this bus.

  • Altera_Forum's avatar
    Altera_Forum
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    The avalon bus is the bus that connects the NIOS and other bits of altera IP together. There may be a ADC/DAC controller that outputs to the avalon bus for this purpose.

  • Altera_Forum's avatar
    Altera_Forum
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    Ok I see, for some reason I thought the Avalon bus was a separate Altera IC. But it is just their embedded bus on the fpga. I will read the Avalon document.

    I'm an EE with some experience coding on TI microcontrollers. Our current designs use microcontrollers with FPGAs as co-processing/routing. But for this design I would like to have a embedded SOC on fpga.

    What do you think are the pros/cons of using NIOS II vs. a separate microcontroller, besides space?
  • Altera_Forum's avatar
    Altera_Forum
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    If a 100MHz cpu without floating point and with a small code/data memory will do what you need to do, the nios will work fine.

    If your code/data is large enough to need external memory that will slow it down a lot more.

    I'm not sure I'd actually want to run Linux on ot.

    OTOH, if you don't use any of the Altera supplied library code (especially printf!), you only need about 4 asm instructions before jumping to C and you can do quite a lot in a small amount of code with no operating system code at all.