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Altera_Forum
Honored Contributor
Honored ContributorWaveform design files
Greetings,
About 10 years ago I created firmware for an Altera PLD using the MAX+PLUS II software. The firmware implemented some simple combinational logic with about a dozen inputs and a dozen outputs. The MAX+PLUS II software synthesized the combinational logic from a waveform design file that spanned all the possible input states and defined the value of each output for each input state. Again, this is simple combinational logic. There is no clock. The outputs change when the inputs change. I was trying to do something similar with the Quartus II software until I came across the following statement in Altera's help manual: "Unlike in the MAX+PLUS II software, waveform files (http://javascript<b></b>:showhelp('ms-its:reference.chm::/glossary/def_wavefile.htm>$global_glosspop')) can be used only as simulation vectors in the Quartus II software, not as design entry files." What's the smart way to implement simple combinational logic (about 2 dozen inputs with about a dozen outputs) with the Quartus II software? Keep in mind that I've only designed firmware for PLDs twice in my 13-year career. Please cover the basics. Thank you, Jeff Philips3 Replies
Altera_ForumSounds O.K.
- Altera_Forum
Thanks for the advice.
However, creating behavioral description seems like a lot of work. I've already created a state table (in an Excel spreadsheet). Transferring that information to a Truth Table statement in AHDL seems straightforward. See "Creating Decoders (AHDL)" in Quartus Help. Anything wrong with doing it this way? Thanks again, Jeff Philips - Altera_Forum
The smartest way to define logic unequivocally is a behavioural description, either in VHDL or Verilog. If the said waveform description is suitable for your design, you may want to use the old MAX+PLUS II software, if you're targetting to a supported chip.
