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Altera_Forum
Honored Contributor
Honored ContributorWarning: RST port on the PLL is not properly connected
Hello! I'm using PLL in my project for the Cyclone V device. And i have this warning in Quartus (Quartus Prime 16.0): --- Quote Start --- Warning: RST port on the PLL is not properly con...
Altera_ForumHonored Contributor
Honored ContributorHi coder, I recommend looking at Alex's suggestion in this thread, it helped me.
http://www.alteraforum.com/forum/showthread.php?t=50680&p=208790#post208790 Basically drive the PLL reset based on the locked output. The recommendation to use a counter is a good idea.
