vref using max10

Question

If using LVDS ,does vref pin must be connected? When vref should be connected except using DDR ?Thanks

rahul_s_intel1 · Answer

Hi ,Kindly find the explanation on the usage of VREF pin in page 10 of the below document https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/max-10/PCG-01018.pdf

Forum Discussion

vref using max10

1 Reply

Recent Discussions

Agilex 7 F Series Transceiver Pins Allowed Voltages During Powerup/When Unpowered

LTC Connector DE10-Standard FPGA

QSPI DDR Interface with Cyclone10LP: Maximum frequency

System PLL of Agliex5 PCIE example design cannot be locked after configuration

MAX 10 FPGA POR trip Levsl and tRAMP