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Altera_Forum's avatar
Altera_Forum
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15 years ago

VREF pin and EPCS and OCT questions

1. In the Cyclone iii's Pin Guidelines, it says" the VREF pins are available as user I/O pins. All of the VREF pins within a bank are shorted together." Does it mean that the four VREF pins in a bank...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

1. no, they are individual I/O, not tied together. you can use the pin planner to assign your design's ports to the VREF pins and QII will use that as a user I/O

2. take a look at the EPCS Controller

3. go to Assignments > Settings, create a new assignment for your pin and select Output Termination as the Assignment Name, and select a value