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Altera_Forum
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14 years ago

View internal signals when simulating testbech (.vht) in ModelSim-ALTERA

After writing and compiling my .vhd program, I create a testbench in Quartus II (Processing > Start > Start Test Bench Template Writer). This process creates a .vht file. After editing and...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Thanks, it works. RTL functionality check allows for probing internal signals. That is, upon opening ModelSim-Altera, compile the .vhd files (bottom up) and then simulate.