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Altera_Forum
Honored Contributor
14 years agoVHDL works only with xilinx
Hi, I wrote a vhdl code that interface with a module through SPI communication protocol my code was done in FSM with next state logic, it worked perfectly with my spartan 3AN board but when i ...
Altera_Forum
Honored Contributor
14 years agoI would recommend that you have a real reset in your design instead of relying on signal power up initialization. This may or may not work depending on tools. The line I'm talking about is: " signal prsnt_state,nxt_state:state:=s1;". Resets in state machines are most critical.
Second I would recommend having a default case in your state machine since you may end up in an undefined state otherwise. This could cause hangups. /Boris