Forum Discussion
6 Replies
- Altera_Forum
Honored Contributor
There is no automated way (software) to do it.
The best way is to learn both languages and do the translation manually. - Altera_Forum
Honored Contributor
--- Quote Start --- There is no automated way (software) to do it. --- Quote End --- X-HDL actually does it with usable result. It's a professional tool and has it's price. http://www.x-tekcorp.com/xhdl.html But I would prefer to translate small sources up to a few hundred lines manually. - Altera_Forum
Honored Contributor
--- Quote Start --- i want to know how we can change my vhdl code into verilog code --- Quote End --- Hi why you want to convert you vhdl code into verilog? :confused: - Altera_Forum
Honored Contributor
from one of singhal's other posts, he is using DSP Builder which only generates VHDL and wants Verilog (for simulation?).
- Altera_Forum
Honored Contributor
HEy thanku Anakha and Schmalisch
My Issue here is that, I am not good at VHDL and wont be able to troubleshoot the errors.:( Am really in a fix right now. I am having my presentation on May 6th. I tried the translatorts, but i couldnt make it work. - Altera_Forum
Honored Contributor
Eh.. I have just bumped into a very nice free IP core and wanted to use it but *DUH* it is in VHDL. It seems like learning both is a way to go. Though for now I'd just find another core. Time is money :)