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Altera_Forum
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17 years ago

VHDL Porting from Altera to Actel

Hi Guys, I am currently designing a FPGA based camera system for a small satellite, its for my masters thesis. As my knowledge is very limited to fpga and vhdl its quite a learning curve. My Qu...
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Altera_Forum
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17 years ago

You may want to consider the various effects of exposure on your device. There is a Single-Event effect which may be mitigated with reprogramming but there are also cumulative Total Dose effects which cause increase in Icc leakage currents and can be longer lasting, or permanently damaging.

You'll find quite a bit of resource by starting here:

http://radhome.gsfc.nasa.gov/

-A

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Have a think about your application a little bit - some satellites use SRAM based FPGA like Xilinx and Altera and get away without the rad hardening because they only run for short periods of time before they are powered off again.

Just a thought - I don't know if it helps or not.

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