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Altera_Forum
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17 years ago

VHDL Porting from Altera to Actel

Hi Guys, I am currently designing a FPGA based camera system for a small satellite, its for my masters thesis. As my knowledge is very limited to fpga and vhdl its quite a learning curve. My Qu...
Altera_Forum's avatar
Altera_Forum
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17 years ago

For the radiation resistant feature to be meaningful at all, you have to perform timing analysis for the target platform with a degraded timing model, hopefully available for the device.