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Honored Contributor[VHDL] Compilation Order
Hi All, How can I define a compilation order of VHDL files in Quartus Prime? Can I do so by a *.do file? Thank you!
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Altera_ForumHonored Contributor
Honored ContributorAs the original question in post# 1 is referring to Quartus Prime, I presume it's about Quartus rather than Modelsim compilation order. As for the former case I agree with Josyb. I have never observed a specific order in Quartus projects, with or without component declaration. Thus I'm under the impression, that Quartus is able to choose the compilation order (if necessary at all) automatically. (It does fine also for a clean build).
Clearly different to Modelsim where instantiated components must me compiled first.
