Forum Discussion

nelky's avatar
nelky
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

VHDL code to perform a write to DDR4

Hi, Good day to you. I need to write a VHDL code to perform a write to DDR4 in Agilex 7. I know that I need to bring up the EMIF IP for use. But within the VHDL code itself, how to call out the E...
Configuration
Programmable Logic Device
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hello,


Thank you for submitting your question in Intel Community.

I'm Adzim, application engineer will assist you in this case.


You need a module that can communicate with the memory controller (EMIF IP) to act as a driver or traffic generator.

This driver should provide the required signal to memory controller in order to perform the memory transaction.

You may refer to Avalon Interface Specifications that provide some details about the avalon transfer: https://www.intel.com/content/www/us/en/docs/programmable/683091/22-3/transfers.html


You also can refer to EMIF example design that can be generated from Quartus.

You can refer to the link below on how to create an EMIF example design.

https://www.intel.com/content/www/us/en/docs/programmable/683162/23-1-2-7-0/design-example-quick-start-guide-for.html


Regards,

Adzim