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Altera_Forum
Honored Contributor
Honored ContributorVHDL code for a sram
hi I am looking for a VHDL code for a sram with something unusual which is an Upper- and a Lower- Byte control. I do not know how to handle this! i have already written this part of code but it is no...
Altera_ForumHonored Contributor
Honored Contributori have also another request. I am looking for the VHDL code of the SRAm controller SLS_UP3_SRAM. In fact, the SRAM controller provided by altera in SOPC Builder for the cyclone II development board seems not usable to me because it is made for a stratix development board which sram has a 32 width data bus (there is written when I generate my system : data_to_and_from_the_de1_sram). So i read somewher ethat the sram controller I need is SLS_UP3_SRAM but I do not find it!
Can someone help me pleaase? i had another solution which was to take a _hw.tlc file and to edit a new component with it but I do not know how to do it with SOPC Builder. It seems that it does not work properly when I do it.:mad:
