[vhdl] artificial neural network

If you start modelsim from Quartus, you will have to run the analysis and synthesis. This checks for problems in your design. Then, when you run modelsim you only simulate. The list of devices is given for people who have such a device or are making hardware for that specific chip. When installing (or downloading I don't remember wich) it gives you an option to download the device families of your choice. I use the web edition and can compile witout problems for my cyclone IV.

Also there are multiple ways of simulating. I usually simulate at RTL level. At this point it just simulates the code and operations' propagation delays are not taken into account. I assume, but others may tell me wrong, that gate level does have p-delays.