Honored Contributor
Honored ContributorAbout clock domain crossing:
To pass your data across there are two issues: 1) data synchronisation to clocks 2) correct data transfer No 1 is to avoid nonbinary states to propagate through other registers. It is implemented as the well known two stage synchroniser. No 2 is based on reading each data sample once and without a miss i.e. needs rate control, storage and hand-shaking signals. if data is slow changing level signal(every now and then) No 1 is enough to synchronise as well as pass the value in time. if data is the usual pattern of changing at any time then you need to store data but synchronise the hand-shake signals...this is not very easy and it is done for you in dc fifos so just use a fifo. In all cases the average rate of data must tend to equality across the domains.
