Verilog Fixed point IP help

If I were to use 8-bit Verilog fixed point arithmetic in my design in Quartus, can I simply declare the 8-bit operands such as wires and regs and start doing operations like:

reg [7:0] a;

reg [7:0] b;

reg [15:0] c;

c<=a*b;

c<=a/b;

c<=a+b;

c<=a-b;

Would this be valid and just work? Please help.

Also can someone point to any good reference guide online or a book on fixed point tutorial/examples in Verilog.