Altera_ForumHonored Contributor14 years agovdhl code for 7segment display i am writing a vhdl code at the moment, am trying to display no 1234 on a 7 segment display but at different times with delay but most time it shows the output at the same time. can anyone help me w...Show More
Altera_ForumHonored Contributor14 years agohow about posting the code you have already and tell us what the problems are?
Recent DiscussionsIP components used in the design have conflicting settings. Intel PCIE Ftile MCDMAImplementation of lower data rate.Error (209014): CONF_DONE pin failed to go high in device 1.eFUSE : Agilex F series and AGilex I series PCIe cardEP4CGX22CF19C8N Failure Short D8 to C8