Using the global clock network in MAXII device

I have a clock signal that I need distributed to my components in a design. This is my first time using a MAXII, so I'm not very sure of myself here - I've made a simple clock signal that takes the on-board developer and divides by two, but I'm aware that clock delay may become a problem if I don't distribute the signal appropriately.

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
entity CLOCK_DIVIDER is
    port(
        reset   :   in std_logic;
        clk :   in std_logic;
        half_clk    :   out std_logic
        );
end CLOCK_DIVIDER;
architecture CLOCK_DIVIDER of CLOCK_DIVIDER is
signal tick : std_logic;
begin
    process(clk, reset)
    begin
        if reset = '1' then
            tick <= '0';
        elsif clk = '1' and clk'EVENT then
            if tick = '0' then
                tick <= '1';
            elsif tick = '1' then
                tick <= '0';
            end if;
        end if;
    end process;
    process(tick)
    begin
        half_clk <= tick;
    end process
end CLOCK_DIVIDER;