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No, I am afraid I can't change the board, so interfacing to the FPGA's JTAG through "neighbouring" pins is not possible.
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Make a note for next time: "Always make the JTAG pins accessible".
You can't get to the pins at all? Is the FPGA in a BGA, what about vias on the bottom of the board? What about the TCK pull-ups/and downs you should have put on the PCB?
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It's a shame that SignalTap II is not more flexible on the PC communications interface... at least I can't think of a good reason why there should not be an option to have the SignalTap II's interface ports be accessible by my top-level module instead of hard-wiring them to the JTAG port.
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The communication to the component is based around the JTAG HUB, and the communications infrastructure in Quartus uses the JTAG interface. It would be too hard for Altera to support a generic interface.
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I have seen there is a Virtual JTAG megafunction, could that be an option to access the "real" JTAG pins from a FPGA module?
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Nope. You can never get to the real JTAG pins. The Virtual JTAG interface is how you get JTAG-like signals inside the FPGA fabric. However, those signals are controlled by the real JTAG pins, via the USB-Blaster.
Cheers,
Dave
Honored Contributor
