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Altera_Forum's avatar
Altera_Forum
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15 years ago

Using INIT_DONE and CONF_DONE

i'm using cyclone 3 and maxII devices. in the two devices i have a 10Hz clock that i need them to be synchronized.

i don't have avaliable pins to use, so i thought using the INIT_DONE or CONF_DONE as an enable to the CPLD 10 HZ clock.

i'm not sure if it is possible, and i wanted to know what is the delay between those signals to the real time in which the FPGA will start his 10HZ clk.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    This is a really bad idea. both clocks will drift in time, so even if it works for a couple of secods, there is no guaranty that it will work for hours.