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HY68's avatar
HY68
Icon for New Contributor rankNew Contributor
6 years ago

Using DDIO_In to read ADC data and timing analysis

Hi, ​ I'm trying to use DDIO to capture ADC LVDS data from ADC3224. The device is set at 2 wires(x6) mode. The FPGA is Arria10(10AX027) and running at 100MHz sampling rate, which makes the ADC_FCLK...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

I am still working on it. Please allow me some time on this.

Thanks.

  • HY68's avatar
    HY68
    Icon for New Contributor rankNew Contributor
    6 years ago

    Hi YY,

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    No rush, appreciate for your support.

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