Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Using a CARRY_SUM primitive for a TDC

Hi, I've been trying for a few days now to use the CARRY_SUM primitive to implement a delay line TDC. I am designing a circuit that looks something like this: input -> CARRY_SUM -> DFF ...
SBuck4's avatar
SBuck4
Icon for New Contributor rankNew Contributor
7 years ago

​Sorry for the significant delay but I am trying to develop a delayline for a TDC. Once I have the delay steps I am happy to work with it. It seems that, no matter what I do I end up with even LAB steps (~500ps) of misaligned delays. Can you point me to some simple code for creating the delay taps required. DNL is not an issue so the simplest code will suffice. Thanks in advance.