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New Contributor

3 years ago

Use FPGA to reclock audio I2S/ADAT/SPDIF signals

Hello, I am completely new to FPGA / CPLD 😞 Any help or guidance will be really appreciate! I am looking for a way to reclock audio spdif/adat/i2s signal to remove jitter. It seems I can use som...

Ash_R_Altera

Regular Contributor

3 years ago

Hi,

As I understand your requirement, I think you are looking for clock switching. Suggest you to please go clocking architecture of whichever device that is targeted. For example, following link talks about MAX 10 clock control block.

https://www.intel.com/content/www/us/en/docs/programmable/683047/21-1/global-clock-control-block.html

Also check the ALTCLKCTRL IP mentioned in the same document.

Regards

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Use FPGA to reclock audio I2S/ADAT/SPDIF signals

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