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lelsteph
New Contributor
New ContributorUse FPGA to reclock audio I2S/ADAT/SPDIF signals
Hello,
I am completely new to FPGA / CPLD 😞 Any help or guidance will be really appreciate!
I am looking for a way to reclock audio spdif/adat/i2s signal to remove jitter. It seems I can use som...
Ash_R_Altera
Regular Contributor
Regular ContributorThere are several reference designs available for reference. Please check below links:
Intel® FPGA SDK for OpenCL Design Examples | Intel
Regards
