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Altera_Forum's avatar
Altera_Forum
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16 years ago

Use conf.done pin

I am using a Cyclone-IV device which is configured as a combination of a NIOS-II and other logic units. "NIOS II reset" is an input signal to reset the NIOS-II processor inside the FPGA. In ad...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Hi Jake,

When you take the signal from the optional INIT_DONE line to your external reset generator, you still need a input pin to input your reset signal from your external reset generator to the FPGA in order to reset your NIOS-II and internal logic units. Is that correct?

Many thanks,

Bcao