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Altera_Forum
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15 years ago

USB Blaster and other JTAG devices in chain

hello, I have a board with three devices that are connected to each other in a JTAG chain: CPU, FPGA (Altera Cyclon IV), PCI-Express switch. We connected a USB-Blaster to the chain JTAG connec...
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Altera_Forum
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15 years ago

Thank you for the reply.

I would also expect Quartus to bypass the other devices (for example, when programming the FPGA).

TRST is not floating, it is held high. I also think of using TRST low to hold the devices in normal mode. I am wondering if holding TRST low for the duration of the FPGA debug mode is the right way, or disconnecting TCK/TMS/TDI/TDO from the other devices is the right thing to do.

Is there any ALTERA document on the subject?