Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorUsage of PLL output pins
In Cyclone-III EP3C16, there are 4 PLLs. I only need to use 2 of them. Each PLL has one dedicated physical output pin. In my application, I need 2 or 3 physical outputs from one PLL. I think that I c...
Altera_ForumHonored Contributor
Honored ContributorI agree with Rysc. Regarding your question, usually what I do when I have a question like yours is just perform a simple test compilation in Quartus. Make a simple dummy project and drive the clock outputs to the four output pins of your choosing. Quartus will tell you if you've done something wrong.
Most likely you'll get a warning regarding jitter performance on any clocks that use a global route rather than a dedicated clock output path. And going by Rysc's experience (which I would trust above my own) you could ignore this. Jake
