URGENT: Peripheral to Memory DMA Transaction

yes. the M9K blocks are dual-interface ram blocks, that can be read and written at the same time.

the avalon has a write and a read signal.

How else could you determine, whether to write to or read from the specified address?

The address lines are there to select, which register (in your case fifo) to read from or write to.

For the fifo design, theres no need for the adder to wait for anything. It could just output the write signal to the fifo, and all is good.