Altera_Forum
Honored Contributor
14 years agoUP clock signals with 27MHz input
I'm using the 'clock signals for DE-series board peripherals' core which uses the external 27MHz crystal connected to the clk_in_secondary input to get a 12.288MHz out which i connected to the AUD_XCK.
I cannot get this to work!!! is there anything else that has to be done to use the 27MHz crystal? i basically just connected the CLOCK_27 to the said secondary input in the top level like i would with the 50MHz (i.e CLOCK_50) I am now using an ALTPLL for 12.5MHz running from 50MHz and it works fine!