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Altera_Forum
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15 years ago

Unwanted inference of RAMs

I am working with an SOPC system design that includes a custom UART component. In the VHDL design of this component, I specify a memory using: type fifo_type is array (0 to NUMWORDS-1) of std_l...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Thakns for the feedback. I mentioned above that using this code alone as it's own project, I can get logic or M4K as I prefer. But this logic is part of a component created for SOPC builder. Regardless of what I do to the logic at this level, I compile my desing (build SOPC system first) and get the M4K. This is why I am stumped.

Apologies, had not posted code before.

Thanks,

Kevin