Unused voltage banks of Max 10

Generally, refer to the MAX10 pin connection guidelines Intel® MAX® 10 FPGA Device Family Pin Connection Guidelines and Quartus *.pin file generated for your project. Don't float dedicated GND and VCCIO pins. All bank VCCIOs must be connected to a valid power supply level.

Regards

Frank

Hi Lakhsmi,

Thank you for the effort to reaching out Intel FPGA Community.

Yes, as Frank have explained, we would suggest you check the Pin Connection Guidelines for Intel Max 10 as per link provided.

There are some pins that need to be connected as per guidelines.

Regards,

Aqid

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