It could be the SPL issue which has WatchDog enabled.
I use the spl from http://www.altera.com/literature/an/cv_boot_guide.zip. It works well.
Now the question is how to disable the WatchDog in Uboot SPL.
The document on the Web is using EDS GUI tool to toggle the option, and the latest document https://rocketboards.org/foswiki/Documentation/BuildingBootloader doesn't mention anything about the WatchDog:
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Boot ROM
The function of the boot ROM code is to determine the boot source, initialize the HPS after a reset, and
jump to the preloader. In the case of indirect execution, the boot ROM code loads the preloader image from
the flash memory to on-chip RAM. The boot ROM performs the following actions to initialize the HPS:
• Enable instruction cache, branch predictor, floating point unit, NEON vector unit
• Sets up the level 4 (l4) watchdog 0 timer
L4 Watchdog 0 Timer
The L4 watchdog 0 timer is reserved for boot ROM use. While booting, if a watchdog reset happens before
software control passes to the preloader, boot ROM code attempts to load the last valid preloader image,
identified by the initswlastld register in the romcodegrp group in the system manager.
If the watchdog reset happens after the preloader has started executing but before the preloader writes a
valid value to initswstate register, the boot ROM increments initswlastld and attempts to load that
image. If the watchdog reset happens after the preloader writes a valid value to initswstate register, boot
ROM code attempts to load the image indicated by initswlastld register.
Typical Preloader Boot Flow
This section describes a typical software flow from the preloader entry point until the software passes control
to the next stage boot software
Low-level initialization steps include reconfiguring or disabling the L4 watchdog 0 timer, invalidating the
instruction cache and branch predictor, remapping the on-chip RAM to the lowest memory region, and
setting up the data area.
Upon entering the preloader, the L4 watchdog 0 timer is active. The preloader can either disable, reconfigure,
or leave the watchdog timer unchanged. Once enabled after reset, the watchdog timer cannot be disabled,
only paused.
The instruction cache and branch predictor, which were previously enabled by the boot ROM code, need
to be invalidated.