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Altera_Forum's avatar
Altera_Forum
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14 years ago

UART recive and send loop

hi:

I post attachments about the UART recive and send loop HDL code ( attachments 1)and signaltap waves .

I have some questions to ask your gurus~!

1:I use the 50M oscilation, when I set baud rate >= 19200bps,then I can send the data which I have received,when the baud rate is 9600bps,I even cannot get the rigth data which I send though UART test assistant.please see the attachments( attachments 2) .

2:My aim is : receive a data though UART test assistant to my board,then send the data to PC,when I set baudrate 19200bps,I often get lots of disordered code before getting the rigth data

please check at my code ,and give me some advise, I will appreciate it !!

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    You defined baud_cnt 8bit wide (range 0 - 255), but for a 9600 baudrate it needs to reach 326, then it overflows.

    Replace line 40 with reg [8:0] baud_cnt;
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    thanks for your reply!~

    I focus on the inaccuracy of the buadrate~

    but,is there somebody answer me the other questions I had post.thanks a lot!!~
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    Regarding question 2, I think a major issue is the fact you use baud_clk and baud_clk16 as clocks signals for the send and recv processes. These are actually generated signals and they don't have the low skew requirement as a real clock has (e.g. from a pll).

    You should clock every process with the primary clock CLK and you'd rather generate single clock enables at the baud_clk and baud_clk16 frequencies to make your job.