Forum Discussion
SYiwe
Occasional Contributor
Occasional Contributortx_bonding_clocks in ATX PLL and RapidIO IP Core
Hi, In my design I instantiate a 4X RapidIO Core and a ATX PLL IP Core. According to Table 12 in RapidIO user guide, I should connect the 24-bit tx_bonding_clocks of ATX PLL to tx_bonding_clocks_chN...
CheepinC_altera
Regular Contributor
Regular ContributorHi,
For your information, the ATX PLL tx_bonding_clocks is only of 6 bits. You would not be able to get 24 bits output. There seems to be some confusion with the RapidIO user guide. Thus, if you are using one ATX PLL, then you would need to connect the same bus of ATX PLL bonding clocks to all the 4 RapidIO channels bonding clock bus. If you are using 4 ATX PLLs, then you can connect each PLL separately to each channel of RapidIO.
Please let me know if there is any concern. Thank you.
Chee Pin
