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Obviously, the "microcontroller stops working" issue can't be solved without tri-stating the data output to the bus. This would require in the first place a bidirectional (inout) port declaration, and secondly additional logic setting the output to (others => 'Z') when unselected. The tri-state operation isn't part of the RAM MegaFunction. On write, the cs would be decoded into WE signal, on read, it can be ignored by the RAM, only the bus tri-state matters.
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well, ok, this works, i have added the tristate as you suggested, and the conflict with Arm has been removed now. but i still have to make sure that the dpram(in fpga) works when it is being enabled by the micro-controller (arm).
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