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Honored Contributor
Honored ContributorTrue Dual Port Ram Synthesizes error with two clock signals
Hello, well i made a vhdl based, true dual port ram, and i wanted to use two separate clock input for each port, but QuatusII don't synthesizes it and generates the following error Error: ...
Altera_ForumHonored Contributor
Honored ContributorDoh
Yeah it does work fine Thicko here was trying to use separate read and write addresses. So yes, Quartus CAN infer true-dual port rams quite easily. Ammar - show us the code you were trying to use.
