True Dual Port Ram Synthesizes error with two clock signals

Hmm, it appears you are correct. You cannot create a dual clocked, true dual port ram from code. You can have quartus infer a simple dual port ram (with write/read on clock1 and read only on the other clock2) but not write from both. it is also not listed in the coding templates.

Raise an enhancement request with altera.

On a side note: to avoid all the stuff you get with the megawizard, instantiate rams directly in your code. You can control all the paramters yourself.

Just include the library in your file:

library altera_mf;

use altera_mf.altera_mf_components.all;

then browse to this directory in your quartus installation:

/quartus/common/help/webhelp/master.htm#mergedProjects/hdl/mega/mega_list_mega_lpm.htm

For Quartus releases pre v10.0, you could link to this help from the help menu via "megafunctions/lpm" but that menu choice has gone now, but the help files still exist. Anything listed as a "parameter" is just a generic.