Forum Discussion

SGlow's avatar
SGlow
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

Trouble enabling HPC to FPGA bridge on Cyclone V SoC

I'm working on a bare metal application on a Cyclone V SoC (5CSEBA6U23I7NDK). Things are going reasonably well, I have the u-boot SPL booting from eMMC on power-up and it's loading my application....
  • SGlow's avatar
    SGlow
    4 years ago

    OK, after many hours of head scratching I think I found my problem.

    To use the HPS->FPGA slave you need to set bit 3 of the remap register located at address 0xFF800000. To use the lightweight bridge you need to set bit 4 of this register.

    Seems to be working now!

    S

aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi SGlow,


Good to know that you have resolved the issue on your side. Thanks a lot for the sharing in your findings.

For my own understanding, I have tried to checked the bit that you set in order to see if it is the same as bridge enable in U-boot. However it only allows write only but not read for remap register. Anyway when I set that particular bit using mw.l in U-boot but, seems that the bridge enable does not happened....

Anyway, I will close this thread for now since the issue has been resolved on your side.


Thanks.

Regards,

Aik Eu