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SGlow's avatar
SGlow
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

Trouble enabling HPC to FPGA bridge on Cyclone V SoC

I'm working on a bare metal application on a Cyclone V SoC (5CSEBA6U23I7NDK). Things are going reasonably well, I have the u-boot SPL booting from eMMC on power-up and it's loading my application....
  • SGlow's avatar
    SGlow
    4 years ago

    OK, after many hours of head scratching I think I found my problem.

    To use the HPS->FPGA slave you need to set bit 3 of the remap register located at address 0xFF800000. To use the lightweight bridge you need to set bit 4 of this register.

    Seems to be working now!

    S

sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
4 years ago

Assuming you're using HWLibs, did you issue alt_bridge_init?

SGlow's avatar
SGlow
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Thanks for the response. I'm not actually using the hwlibs, but did read through the code for alt_bridge_init and I think I'm doing everything that it does (which isn't really much other then take the bridge out of reset). I'll keep looking.