Tristate Buffer and Open Drain

Question

Hi

I would like to implement open drain function with the verilog code below:

assign q = sel ? 1'bz : 1'b0; //open drain

assign q = sel ? 1'b1 : 1'bz; // use tristate buffer to model open drain function with weak pull up resistor

Both using Pin Assignment with weak pull up resistor on q.

So, are they equivalent? Will the tristate buffer cause the contention?

Thanks.

altera_forum · Answer

They are not equivalent. The first one is the right code, if I understood what you mean.

The second one doesn't make sense: you'd always get a high level on that pin, unless you have an external pull DOWN instead of the internal pull up.

altera_forum · Answer

You are right.  i do a mistake there.  thanks

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