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Altera_Forum's avatar
Altera_Forum
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15 years ago

Transportation delay problem

Dear Experts, I am having problem with simulation of the transportation delay,.i.e., it does not show any impact on the resulting waveform.I am using Quartus II here is the code,copy-pasted from...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Translate your schematic circuit in VHDL.

For the moment just take advice from a VHDL book and translate each FF, each adder and each combinatorial block in VHDL code as suggested in the book.

You can also start with small blocks that in Quartus can be converted in symbols to replace part of your working schematic design.

Then start using vectors and procedural blocks to improve code readability.

Always remember that VHDL describes circuits.