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Altera_Forum's avatar
Altera_Forum
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11 years ago

Transceiver PCS Question

When implementing GIGE on CycloneV transceiver using Custom Phy is needed to perform "running disparity rules" on FPGA logic outside transceiver phy? I think the answer is yes, but I would to c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Are you referring to running disparity checking? If I remember it correct the Custom PHY has this function available where it will flag error when running disparity is incorrect. The output status port is rx_disperr.