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Honored Contributor
Honored ContributorTotal execution time and propagation delay
hi, How to calculate total execution time and propagation delay for VHDL files under Quartus II? Thank you
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- A circuit does not "exectue" inside an FPGA - it always exists, and is always running. It is a circuit, not a piece of software. --- Quote End --- If a circuit does not "exectue" inside an FPGA, why it has a Fmax? Can we not consider T=1/Fmax a minimum execution time of a circuit?
